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 DATASHEET
MULTIPLIER AND ZERO DELAY BUFFER Description
The ICS570-01 is a high-performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary mixed signal Phased Lock Loop (PLL) techniques. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of the output clock, giving the appearance of no delay through the device. The device includes an on-chip ROM table with nine different mulitplication factors, allowing it to generate many common output frequencies from a single input.
ICS570-01 Features
* * * * * * * * * *
8-pin MSOP package (3.00 mm x 3.00 mm body) Available in Pb (lead) free package Low input to output skew of 300 ps max Can recover degraded input clock duty cycle Output clock duty cycle of 45/55 Power Down and Tri-State Mode Accepts spread spectrum clock inputs Advanced, low power CMOS process 3.3 V operation Industrial temperature version available
Block Diagram
Power
S1:0 ICLK FBIN
2
PLL
CLK
GND
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Pin Assignment
ICLK S0 GND FBIN 1 2 3 4 8 7 6 5 S1 VDD VDD CLKOUT
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 Pin Name ICLK S0 GND FBIN CLKOUT VDD VDD S1 Pin Type Input Input Power Input Output Power Power Input Pin Description Clock input. Select pin 0 for output clock. Connect to GND, VDD, or float per multiplier table. Connect to ground. Feedback clock input. Clock output with 5x multiplier. Connect to 3.3 V supply. Connect to 3.3 V supply. Select pin 1 for output clock. Connect to GND, VDD, or float per multiplier table.
Clock Multiplier Table
S1
0 0 0 M M M 1 1 1
S0
0 M 1 0 M 1 0 M 1
Multiplier
4x 5.333x 5x 2.5x 2x 3.333x 6x 3x 8x
ICLK Range
7 - 24 MHz 8 - 20 MHz 7 - 22 MHz 11 - 44 MHz 13 - 55 MHz 10 - 33 MHz 7 - 18 MHz 11 - 37 MHz 5 - 13 MHz
Note: For selections marked "M", the pin is left floating.
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External Components
The ICS570-01 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01 F should be connected between VDD and GND (pins 3, 6, and 7), as close to the device as possible. A series termination resistor of 33 may be used on each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS570-01. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature, Commercial version Ambient Operating Temperature, Industrial version Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70 C -40 to +85 C -65 to +150 C 125 C 260 C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
-40 +3.15
Typ.
+3.3
Max.
+85 +3.45
Units
C V
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DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature -40 to +85 C
Parameter
Operating Voltage Operating Current Input High Voltage Input Low Voltage Input High Voltage, mid-level input Input Low Voltage, mid-level input Output High Voltage (CMOS High) Output High Voltage Output Low Voltage Short Circuit Current Input Capacitance
Symbol Conditions
VDD IDD VIH VIL VIH VIL VOH VOH VOL IOS CIN ICLK, FBIN, S0, S1 VDD=3.3 V ICLK, FBIN ICLK, FBIN S0, S1 S0, S1 IOH = -4 mA IOH = -12 mA IOL = 12mA
Min.
3.15
Typ.
16
Max.
3.45
Units
V mA V
2 0.8 VDD-0.5 0.5 VDD-0.4 2.4 0.4 70 5
V V V V V V mA pF
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature -40 to +85 C
Parameter
Input Frequency, ICLK Output Clock Frequency Input to Feedback Skew Part-to-part Skew Input to Output Jitter Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle
Symbol
Conditions
Min.
Typ.
See page 2
Max. Units
MHz MHz 300 700 ps ps ps ns ns %
ICLK to FBIN 20% to 80%, Note1 80% to 20%, Note 1 Measured at VDD/2, Note 1 45 1.2 1.2 50
200 2.5 2.5 55
Note 1: Measured with a 15 pF load.
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case
Symbol
JA JC
Conditions
Still air
Min.
Typ.
95 48
Max. Units
C/W C/W
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Package Outline and Package Dimensions (8-pin MSOP, 3.00 mm Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters Symbol Min Max Inches* Min Max
8
E1 IN D E X AREA
E
1
2
D
A A1 A2 b C D E E1 e L aaa
-1.10 0 0.15 0.79 0.97 0.22 0.38 0.08 0.23 3.00 BASIC 4.90 BASIC 3.00 BASIC 0.65 Basic 0.40 0.80 0 8 0.10
-0.043 0 0.006 0.031 0.038 0.008 0.015 0.003 0.009 0.118 BASIC 0.193 BASIC 0.118 BASIC 0.0256 Basic 0.016 0.032 0 8 0.004
*For reference only. Controlling dimensions in mm.
A 2 A 1 A
c
-Ce
b S E A T IN G P LA N E L
aaa
C
Ordering Information
Part / Order Number
ICS570GI-01LF ICS570GI-01LFT
Marking
GI1L GI1L
Shipping Packaging
Tubes Tape and Reel
Package
8-pin MSOP 8-pin MSOP
Temperature
-40 to +85 C -40 to +85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
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Revision History
Rev.
A B
Originator
K. Beckmeyer J. Sarma
Date
01/25/06 07/27/06
Description of Change
New device/datasheet; Preliminary release. Added marking information; added new document format; released from Preliminary to final.
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www.IDT.com
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Corporate Headquarters
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(c) 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA


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